Hardware Implementation of a Chaotic Oscillatory Neural Network by NVidia CUDA Technology
Keywords:
Hardware Implementation, Graphics Processors, Neurocomputer, Clustering, Oscillatory Chaotic Neural NetworkAbstract
Purpose: The paper deals with the problem of hardware implementation of chaotic oscillatory neural networks used for clusterization
tasks. The goal of this paper is to simplify the process of using oscillatory chaotic neural networks in practical applications through
a number of approaches, algorithms and structural solutions for their hardware implementation. Methods: Analyzing features of
oscillatory neural networks, defining the basic stages in the clusterization task on the basis of oscillatory neural networks, analyzing
alternative variants of the computing process organization. Results: Algorithmic solutions for hardware implementation of chaotic
oscillatory neural networks were developed and discussed. Algorithms for finding the output values of neurons with different patterns
of memory access and with different network size were developed. The results of the tests showed that the methods of X-flow and Y-flow streams should be used in networks of a size not exceeding half the maximum possible number of concurrent videocard streams, as this approach provides the shortest computation time. For the storage of the synchronization matrix, some variants of memory allocation were proposed, taking into account the network size on basis of buffering. Several ways were discussed to analize the results of interneuron synchronization results, on basis of undirected graphs and systems of disjoint sets. An effective network implementation was developed, based on CUDA, taking into account the features of the network. Practical relevance: The research results and algorithmic solutions can be used in developing oscillatory chaotic neural network hardware, adequate for the features of chaotic neural network functioning, usage and application for problems of clustering.